2m x 16 static ram module CYM8210Bpm cypress semiconductor corporation ? 3901 north first street san jose ca 95134 408-943-2600 document #: 38-05008 rev. ** revised april 26, 2001 features ? high-density 32-megabit sram module low active power ? 5.3w (max.) at 25 ns smd technology ttl-compatible inputs and outputs low profile ? max. height of 0.725 in. available in 80 pin simm package functional description the cym8210 is a high-performance 8-megabit static ram module organized as 2m words by 16 bits. this module is con- structed using eight 512k x 8 srams (cy62148) in soj pack- ages mounted on an epoxy laminate board with pins. writing to each byte is accomplished by enabling the appropri- ate chip select (e0, e1, e2, e3) and write enable (wh or wl). data on the input/output pins (i/o) is written into the mem- ory location specified on the address pins (a 0 through a 17 ). reading the device is accomplished by taking the appropriate chip select (e0, e1, e2, e3) low while write enable (we ) remains high. under these conditions, the contents of the memory location specified on the address pins will appear on the data input/output pins (i/o). the data input/output pins stay at the high-impedance state when write enable is low or the appropriate chip selects are high. the cym8210 module is shipped as a 80 pin simm. logic block diagram 8210 ? 1 a 0 ? a 17 g i/o 0 ? i/o 7 e2 i/o 8 ? i/o 15 e0 18 8 8 8 8 8 8 8 8 e1 e3 i/o 0 ? i/o 7 i/o 0 ? i/o 7 i/o 0 ? i/o 7 i/o 8 ? i/o 15 i/o 8 ? i/o 15 i/o 8 ? i/o 15 wh 512k x 8 sram 512k x 8 sram 512k x 8 sram 512k x 8 sram 512k x 8 sram 512k x 8 sram 512k x 8 sram 512k x 8 sram wl
CYM8210Bpm document #: 38-05008 rev. ** page 2 of 8 selection guide 8210-70 maximum access time (ns) 70 maximum operating current (ma) 158 maximum standby current ( a) 150 pin configurations 8210 ? 2 simm top view 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 66 68 70 65 67 69 72 71 80-pin 74 73 75 77 80 78 76 79 vss vcc nc vss nc nc nc nc nc nc nc nc nc nc nc nc nc nc e3 e2 e1 e0 g wh wl nc nc nc nc nc nc nc nc a 8 a 10 a 12 a 14 a 16 a 18 a 0 a 2 a 4 a 6 a 7 a 9 a 11 a 13 a 15 a 17 a 1 a 3 a 5 vcc vss vss vss vss vss vss nc nc nc nc nc i/o 4 i/o 6 i/o 8 i/o 10 i/o 12 i/o 14 i/o 0 i/o 2 i/o 5 i/o 7 i/o 9 i/o 11 i/o 13 i/o 15 i/o 1 i/o 3
CYM8210Bpm document #: 38-05008 rev. ** page 3 of 8 maximum ratings (above which the useful life may be impaired. for user guide- lines, not tested.) storage temperature ? 55 c to +125 c ambient temperature with power applied ? 10 c to +85 c supply voltage to ground potential ? 0.5v to +7.0v dc voltage applied to outputs in high z state ? 0.5v to +7.0v dc input voltage ? 0.5v to +7.0v operating range range ambient temperature v cc commercial 0 c to +70 c 5v 10% electrical characteristics over the operating range parameter description test conditions cym8210-70 min. max. unit v oh output high voltage v cc = min., i oh = ? 1.0 ma 2.4 v v ol output low voltage v cc = min., i ol = 2.1 ma 0.4 v v ih input high voltage 2.2 v cc v v il input low voltage ? 0.3 0.8 v i ix input leakage current gnd < v i < v cc ? 10 +10 a i oz output leakage current gnd < v o < v cc , output disabled ? 10 +10 a i cc v cc operating supply current v cc = max., i out = 0 ma, cs < v il 158 ma i sb1 automatic cs power- down current [1] max. v cc , cs > v ih , min. duty cycle = 100% 120 ma i sb2 automatic cs power- down current [1] max. v cc , cs > v cc - 0.2v, v in > v cc ? 0.2v, or v in < 0.2v 150 a capacitance [ 2 ] parameter description test conditions max. unit c in input capacitance t a = 25 c, f = 1 mhz, v cc = 5.0v 60 pf c out output capacitance 50 pf ac test loads and waveforms notes: 1. a pull-up resistor to v cc on the e3 /e2 /e1 /e0 input is required to keep the device deselected during v cc power-up, otherwise i sb will exceed values given. 2. tested on a sample basis. 8210 ? 4 8210 ? 5 90% 10% 3.0v gnd 90% 10% all input pulses 5v output 30 pf including jig and scope 5v output 5 pf including jig and scope (a) (b) <5ns <5 ns output r1481 ? r1481 ? r2 255 ? r2 255 ? 167 ? equivalent to: th venin equivalent 1.73v
CYM8210Bpm document #: 38-05008 rev. ** page 4 of 8 switching characteristics over the operating range [ 3 ] 70 ns parameter description min. max. unit read cycle t rc read cycle time 70 ns t aa address to data valid 70 ns t oha output hold from address change 10 ns t acs e3 /e2 /e1 /e0 low to data valid 70 ns t doe g low to data valid 35 ns t lzoe g low to low z 5 ns t hzoe g high to high z 25 ns t lzcs e3 /e2 /e1 /e0 low to low z [4] 10 ns t hzcs e3 /e2 /e1 /e0 high to high z [4, 5] 25 ns t pd e3 /e2 /e1 /e0 high to power-down 70 write cycle [6] t wc write cycle time 70 ns t scs e3 /e2 /e1 /e0 low to write end 60 ns t aw address set-up to write end 60 ns t ha address hold from write end 0 ns t sa address set-up to write start 0 ns t pwe wh /wl pulse width 55 ns t sd data set-up to write end 25 ns t hd data hold from write end 0 ns t lzwe wh /wl high to low z 5 ns t hzwe wh /wl low to high z [5] 25 ns notes: 3. test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5v, input pulse levels of 0 to 3 .0v, and output loading of the specified i ol /i oh and 30-pf load capacitance. 4. at any given temperature and voltage condition, t hzcs is less than t lzcs for any given device. these parameters are guaranteed by design and not 100% tested. 5. t hzcs and t hzwe are specified with c l = 5 pf as in part (b) of ac test loads and waveforms. transition is measured 500 mv from steady-state voltage. 6. the internal write time of the memory is defined by the overlap of e3 /e2 /e1 /e0 low and wh /wl low. both signals must be low to initiate a write and either signal can terminate a write by going high. the data input set-up and hold timing should be referenced to the rising edge of th e signal that terminates the write.
CYM8210Bpm document #: 38-05008 rev. ** page 5 of 8 switching waveforms read cycle no. 1 [7, 8] read cycle no. 2 [7, 9] write cycle no. 1 (we controlled) [6] notes: 7. wh /wl is high for read cycle. 8. device is continuously selected, e3 /e2 /e1 /e0 = v il and g = v il . 9. address valid prior to or coincident with e3 /e2 /e1 /e0 transition low. previous data valid data valid t rc t aa t oha 1841a ? 6 address data out data valid t rc t acs t doe t lzoe t lzcs high impedance t hzoe t hzcs high impedance 8210 ? 7 data out g e3 /e2 /e1 /e0 t wc data valid data undefined high impedance t scs t aw t sa t pwe t ha t hd t hzwe t lzwe t sd wh /wl 8210 ? 8 address data in data out e3 /e2 /e1 /e0
CYM8210Bpm document #: 38-05008 rev. ** page 6 of 8 write cycle no. 2 (e3 /e2 /e1 /e0 controlled) [6, 10] note: 10. if e3 /e2 /e1 /e0 goes high simultaneously with wh /wl high, the output remains in a high-impedance state. switching waveforms (continued) t wc data valid data undefined high impedance t scs t aw t pwe t ha t hd t hzwe t sd wh/wl 8210 ? 9 address data in data out t sa e3 /e2 /e1 /e0
CYM8210Bpm document #: 38-05008 rev. ** page 7 of 8 ? cypress semiconductor corporation, 2001. the information contained herein is subject to change without notice. cypress semico nductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress semiconductor product. nor does it convey or imply any license unde r patent or other rights. cypress semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected t o result in significant injury to the user. the inclusion of cypress semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in do i ng so indemnifies cypress semiconductor against all charges. ordering information speed (ns) ordering code package name package type operating range 70 CYM8210Bpm-70c pm49 80-pin plastic simm module commercial package diagrams 80-pin plastic simm module pm49
CYM8210Bpm document #: 38-05008 rev. ** page 8 of 8 document title: CYM8210Bpm 2m x 16 sram module datasheet document number: 38-05008 rev. ecn no. issue date orig. of change description of change ** 106011 05/07/01 meg new data sheet
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